Semiconductor power devices are specialized devices that typically are used as switches or rectifiers in power electronics circuits. Semiconductor power devices are characterized by their ability to withstand high voltages and large currents as well as the high temperatures associated with high power operation. For example, a switching voltage regulator typically includes two power devices that constantly switch on and off in a synchronized manner to regulate a voltage. The power devices in this situation need to sink system-level current in the on state, withstand the full potential of the power supply in the off state, and dissipate a large amount of heat. The ideal power device is able to operate in high power conditions, can rapidly switch between on and off states, and exhibits low thermal and on-state resistance.
A typical semiconductor power device package includes a set of discrete power transistors each of which is fabricated on its own respective semiconductor die. The individual dice are encapsulated in an insulating mold compound with a leadframe structure that provides external electrical connections for individual devices or integrated circuits formed in the semiconductor dice. The leadframe structure typically includes a central paddle surrounded by leads. The semiconductor dice typically are mounted on the paddle, and die pads on the semiconductor dice are electrically connected to respective ones of the leads. For each discrete power transistor die, current typically flows vertically through the die between a front-side contact and a backside contact that typically is electrically connected to the package paddle.
High power semiconductor applications, such as power switching and power handling, require electrical connections between the die pads and the package leads that are characterized by high current carrying capacity, low resistance, and/or low inductance. For these reasons, efforts have been made to use electrically conductive ribbon or pre-formed clips composed of copper, copper alloy, or aluminum instead of bond wires for high power electrical connections within semiconductor packages. Electrically conductive clips, however, are physically large and difficult to mechanically position on a chip with high accuracy.
In a typical semiconductor power device package, each discrete power transistor die is electrically connected to the package with a single front-side high-current package lead, a single front-side low-current package lead for gate control, and a backside connection to the package paddle. With only a single high-current front-side connection per die, electrically conductive clips readily can be used for the front-side connections in these types of package arrangements without compromising manufacturability or performance.
Power devices may be implemented using lateral diffusion field effect transistors (LDFETs), such as lateral diffusion metal oxide semiconductor (LDMOS) transistors. These types of transistors are characterized by a “lateral diffusion” region (or low-doped or lightly-doped drain (LDD) region) that corresponds to an extension of the drain region that is less strongly doped than the core drain region and that extends laterally away from the channel. The lateral diffusion region increases an LDFET's ability to handle higher voltages in the off-state by absorbing portions of the electric field that would otherwise cause source-drain punch-through and to handle larger currents in the on-state by preventing a large potential drop from building up at the drain-body interface which would otherwise result in degradation of the device via the injection of hot carriers into the body of the device.
Lateral power devices, such as LDFETs, typically have front-side source and drain contacts, each of which typically has its own high current, low resistance, and/or low inductance front-side electrical connection. The need for both external (e.g., package) and on-chip electrical connections increases with the number of lateral power devices that are integrated on the same die. The front-side of a semiconductor die, however, has limited space available to accommodate the relatively large sizes of high performance electrical connections. This limitation severely restricts circuit design flexibility, performance, and manufacturability of integrated lateral power device circuits.